Compilation techniques for reconfigurable architectures

Compilation techniques for reconfigurable architectures

Cardoso, J.M.
Diniz, P.C.

90,43 €(IVA inc.)

This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques have been developed in the context of compilation for traditional architectures and high-level synthesis, their application to reconfigurable architectures poses a whole new set of challenges – particularly when targeting fine-grained reconfigurable architectures such as contemporary Field-Programmable Gate-Arrays (FPGAs). Organized in eight chapters, ‘Compilation Techniques for Reconfigurable Architectures’ provides a helpful structure for practitioners andgraduate students in the area of computer science and electrical and computerengineering to effectively map computations to reconfigurable architectures Introduces hardware compilation and reconfigurable computing architectures Presents a range of compiler code transformations and mapping techniques focusing on imperative programming languages. Bridges the gap between software compilation, hardware compilation, and synthesis domains. Brings a number of compilation techniques together into one structured source, and includes representativeexamples of their applications INDICE: Introduction.- Overview of Reconfigurable Architectures.- Compilation and Synthesis Flows.- Code Transformations.- Mapping and Execution Optimizations.- Compilers for Reconfigurable Architectures.- Perspectives on Programming Reconfigurable Computing Platforms.- Final Remarks.

  • ISBN: 978-0-387-09670-4
  • Editorial: Springer
  • Encuadernacion: Cartoné
  • Páginas: 245
  • Fecha Publicación: 01/11/2008
  • Nº Volúmenes: 1
  • Idioma: Inglés